Add eDP display overlays for hamoa and purwa IoT EVKs - #1706

Add dtsi to describe the xe180100 CAMSS block

4 x CSIPHY
3 x TPG
2 x CSID
2 x CSID Lite
2 x IFE
2 x IFE Lite

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-3-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…gulators

Add pmic,id = m rpmh to regulator definitions. This regulator set provides
vreg_l3m_1p8 the regulator for the ov08x40 RGB sensor on the CRD.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-4-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…SIPHY4

Define ov08x40 on cci1_i2c1. The RGB sensor appears on the AON CCI pins
connected to CSIPHY4 in four lane mode.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-5-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…h voltage levels for IR and RGB camera

Add the PM8010 PMIC providing the following voltage rails:

vreg_l1m_r @ 1v2 IR sensor
vreg_l2m_r @ 1v2 RGB sensor
vreg_l3m_r @ 1v8 IR sensor
vreg_l4m_r @ 1v8 RGB sensor
vreg_l5m_r @ 2v8 IR sensor
vreg_l7m_r @ 2v8 RGB sensor

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-6-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…on CSIPHY4

Switch on the ov02c10 RGB sensor on CSIPHY4.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-7-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…amera PMIC with voltage levels for IR and RGB camera

Add voltage regulators-8 for Camera on slim7x including:

- vreg_l1m_1p2
- vreg_l3m_1p8

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-8-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…voltage regulator for RGB camera

Some sleuthing work by Aleksandrs Vinarskis in the bowels of the ACPI
tables for this part shows we need l7b_2p8 for the avdd supply.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-9-1d5a9306116a@linaro.org/
Suggested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…RGB sensor on CSIPHY4

Add in the RGB sensor on CSIPHY4.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-10-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

…CAMSS RGB sensor

Inspiron14 has a ov02e10 sensor on CSIPHY4. Enable the list of dependencies
now.

Link: https://lore.kernel.org/all/20260326-x1e-camss-csi2-phy-dtsi-v3-11-1d5a9306116a@linaro.org/
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

Add pm8010 L4M regulator which is used by Camera I2C pull-up.

Signed-off-by: Tingguo Cheng <tingguo.cheng@oss.qualcomm.com>
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-1-36f895a24d8f@oss.qualcomm.com/

Enable IMX577 via CCI on Hamoa EVK Core Kit.

The Hamoa EVK board does not include a camera sensor
by default, this DTSO has enabled the Arducam 12.3MP
IMX577 Mini Camera Module on the CSI-1 interface.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260227-hamoa_evk-v1-2-36f895a24d8f@oss.qualcomm.com/

…vice

Interconnect from SCM device are optional and were added to get
additional performance benefit. These nodes however delays the
SCM firmware device probe due to dependency on interconnect and
results in NULL pointer dereference for the users of SCM device
driver APIs, such as PDC driver.

Remove them from the scm device to unblock the user.

Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-1-760c8593ce50@oss.qualcomm.com
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>

Add deepest idle state along with pdc config reg to make GPIO IRQs work
as wakeup capable interrupts in deepest idle state.

Add QMP handle to allow PDC device to place a SoC level low power mode
restriction.

Link: https://lore.kernel.org/r/20260312-hamoa_pdc-v1-4-760c8593ce50@oss.qualcomm.com
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>

Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
bug addressed in commit e9a48ea ("irqchip/qcom-pdc: Workaround
hardware register bug on X1E80100") is already fixed in Purwa silicon.

Hamoa compatible forces the software workaround. Use the Purwa specific
compatible string for the PDC node to remove the workaround from Purwa.

Fixes: f08edb5 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
Link: https://lore.kernel.org/r/20251231-purwa_pdc-v1-2-2b4979dd88ad@oss.qualcomm.com
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>

Purwa's GPU does not support SID 1, which is typically used for
LPAC-related traffic. Remove SID 1 from the GPU node's iommus property to
accurately describe the hardware. This fixes the splat below, seen with
some versions of Gunyah hypervisor:

  Internal error: synchronous external abort: 0000000096000010 [qualcomm-linux#1]  SMP
  CPU: 0 UID: 0 PID: 80 Comm: kworker/u33:2 Tainted: G   M
  Tainted: [M]=MACHINE_CHECK
  Hardware name: Qualcomm Technologies, Inc. Purwa IoT EVK (DT)
  Workqueue: events_unbound deferred_probe_work_func
  pstate: 21400005 (nzCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
  pc : arm_smmu_write_s2cr+0x9c/0xbc
  lr : arm_smmu_master_install_s2crs+0x78/0xa4
  sp : ffff80008039b570
  x29: ffff80008039b570 x28: 0000000000000000 x27: ffffaddd62f1ab78
  x26: ffff00080a4ff280 x25: 0000000000000018 x24: ffff00080b896480
  x23: ffff00080ba9b7a0 x22: ffff00080bb05160 x21: 0000000000000000
  x20: 0000000000000000 x19: 0000000000000001 x18: 00000000ffffffff
  x17: 0000000000000000 x16: 0000000000000000 x15: ffff80008039b1d0
  x14: ffff80010039b37d x13: 00746c7561662d74 x12: 0000000000000000
  x11: ffff00080b7fbd98 x10: ffffffffffffffc0 x9 : ffffffffffffffff
  x8 : 0000000000000228 x7 : 0000000000000e87 x6 : 0000000000000000
  x5 : 0000000000000000 x4 : ffff00080a4ff280 x3 : 0000000000000000
  x2 : ffff800082a40c04 x1 : 0000000000000000 x0 : ffff800082a40000
  Call trace:
   arm_smmu_write_s2cr+0x9c/0xbc (P)
   arm_smmu_master_install_s2crs+0x78/0xa4
   arm_smmu_attach_dev+0xb0/0x1d8
   __iommu_device_set_domain+0x84/0x11c
   __iommu_group_set_domain_internal+0x60/0x120
   __iommu_attach_group+0x88/0x9c
   iommu_attach_device+0x6c/0xa0
   msm_iommu_new.part.0+0x84/0xe4 [msm]
   msm_iommu_gpu_new+0x3c/0x104 [msm]
   adreno_iommu_create_vm+0x24/0xc8 [msm]
   a6xx_create_vm+0x48/0x78 [msm]
   msm_gpu_init+0x2d8/0x508 [msm]
   adreno_gpu_init+0x208/0x324 [msm]
   a6xx_gpu_init+0x604/0x8cc [msm]
   adreno_bind+0xb4/0x124 [msm]
   component_bind_all+0x114/0x23c
   msm_drm_init+0x1b0/0x1ec [msm]
   msm_drm_bind+0x30/0x3c [msm]
   try_to_bring_up_aggregate_device+0x164/0x1d0
   __component_add+0xa4/0x16c
   component_add+0x14/0x20
   msm_dp_display_probe_tail+0x4c/0xac [msm]
   msm_dp_auxbus_done_probe+0x14/0x20 [msm]
   dp_aux_ep_probe+0x4c/0xf4 [drm_dp_aux_bus]
   really_probe+0xbc/0x29c
   __driver_probe_device+0x78/0x12c
   driver_probe_device+0x3c/0x15c
   __device_attach_driver+0xb8/0x134
   bus_for_each_drv+0x88/0xe8
   __device_attach+0xa0/0x190
   device_initial_probe+0x50/0x54
   bus_probe_device+0x38/0xa4
   deferred_probe_work_func+0x88/0xc0
   process_one_work+0x148/0x28c
   worker_thread+0x2cc/0x3d4
   kthread+0x12c/0x204
   ret_from_fork+0x10/0x20
  ---[ end trace 0000000000000000 ]---

Fixes: 1aa0b4e ("arm64: dts: qcom: x1p42100: Add GPU support")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260410-purwa-gpu-dt-fix-v1-1-4637892156cf@oss.qualcomm.com

Add node for the X1P42100 camera subsystem.

Link: https://lore.kernel.org/all/20260410-purwa_camss-v1-3-eedcf6d9d8ee@oss.qualcomm.com/
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>

enable camss node for purwa iot evk board camss tpg support.

Link: https://lore.kernel.org/all/20260410-purwa_camss-v1-4-eedcf6d9d8ee@oss.qualcomm.com/
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>

Add embedded controller node for Hamoa/Purwa CRDs which adds fan control,
temperature sensors, access to EC internal state changes and suspend
entry/exit notifications to the EC.

Link: https://lore.kernel.org/lkml/20260427-add-driver-for-ec-v8-4-702f74e495f7@oss.qualcomm.com/
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Co-developed-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>

Add embedded controller node for Hamoa IOT EVK boards which adds fan
control, temperature sensors, access to EC internal state changes and
suspend entry/exit notifications to the EC.

Link: https://lore.kernel.org/lkml/20260427-add-driver-for-ec-v8-5-702f74e495f7@oss.qualcomm.com/
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Tested-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Co-developed-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>
Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>

… points

The Iris block on X1P differs from SM8550/X1E in its clock configuration
and requires a dedicated OPP table. The node inherited from the X1E cannot
be reused directly, and the fallback compatible "qcom,sm8550-iris" cannot
be applied.

Override the inherited clocks, clock-names, and operating points, and
replaces them with the X1P42100-specific definitions. A new OPP table
is provided to support the correct performance levels on this platform.

Link: https://lore.kernel.org/linux-arm-msm/20260429-enable_iris_on_purwa-v5-4-438fa96da248@oss.qualcomm.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>

Enable video nodes on the purwa-iot-som board.

Link: https://lore.kernel.org/linux-arm-msm/20260429-enable_iris_on_purwa-v5-5-438fa96da248@oss.qualcomm.com/
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>

Switch the iris video codec node in hamoa from the legacy 'iommus'
property to 'iommu-map', using IRIS_NON_PIXEL_VCODEC and IRIS_PIXEL
function IDs to identify the non-pixel and pixel context bank SMMU
stream mappings respectively.

Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>

On Qualcomm Hamoa SoCs, the memlat governor and the mechanism
to control the LLCC and DDR/DDR_QOS is hosted on the CPU Control
Processor (CPUCP). Add the vendor protocol node to the existing
SCMI transport to enable QCOM SCMI Generic Extension protocol on
Hamoa SoCs.

Link: https://lore.kernel.org/lkml/20260507062237.78051-9-sibi.sankar@oss.qualcomm.com/
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>

Purwa IOT boards support a different thermal junction temperature
specification compared to the base Purwa platform due to package
level differences.

Update the passive trip thresholds to 105°C to align with the higher
temperature specification.

Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260416-purwa_high_tj-v1-1-b538f98d42da@oss.qualcomm.com

Add video firmware node to enable video kvm on the hamoa.

Signed-off-by: Renjiang Han <renjiang@qti.qualcomm.com>

…devices

Add label properties to TPDM and CTI nodes in the hamoa device tree to
provide human-readable identifiers for each CoreSight device. These
labels allow userspace tools and the CoreSight framework to identify
devices by name rather than by base address.

Link: https://lore.kernel.org/linux-arm-msm/20260414-add-label-to-coresight-device-v2-7-5017d07358f2@oss.qualcomm.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>

Unlike the CPU, the CDSP does not throttle its speed automatically
when it reaches high temperatures in hamoa.

Set up CDSP cooling for both instances by throttling the cdsp, when
it reaches 95°C.

Link: https://lore.kernel.org/linux-devicetree/20260609-qmi-tmd-v3-8-291a2ff4c634@oss.qualcomm.com/
Signed-off-by: Dipa Ramesh Mantre <dipa.mantre@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>

…rwa IOT EVK

Document the qcom,purwa-iot-evk-ec compatible for the embedded controller
found on Purwa IOT EVK boards.

Like the CRD, the Purwa IOT EVK carries an on-board embedded controller,
provided by ITE and running on a separate MCU, which handles fan control,
temperature sensors and EC state-change/suspend notifications. The existing
Hamoa IOT EVK documents the same EC via qcom,hamoa-iot-evk-ec.

Like the other reference designs, it uses qcom,hamoa-crd-ec as its fallback
compatible.

Link: https://lore.kernel.org/all/20260703-ec_support_for_purwa_evk-v2-1-c59aac5c6aac@oss.qualcomm.com/
Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>

Add embedded controller node for Purwa IOT EVK boards which adds fan
control, temperature sensors, access to EC internal state changes and
suspend entry/exit notifications to the EC.

Link: https://lore.kernel.org/all/20260703-ec_support_for_purwa_evk-v2-2-c59aac5c6aac@oss.qualcomm.com/
Tested-by: Yushan Li <yushan.li@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Anvesh Jain P <anvesh.p@oss.qualcomm.com>

X1P42100 (Purwa) shares the X1E80100 (Hamoa) PDC device, but the hardware
register bug addressed in commit e9a48ea ("irqchip/qcom-pdc:
Workaround hardware register bug on X1E80100") is already fixed in
X1P42100 silicon.

X1E80100 compatible forces the software workaround. Use the X1P42100
specific compatible string for the PDC node to remove the workaround.

Fixes: f08edb5 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
Link: https://lore.kernel.org/r/20260616-purwa-pdc-v2-2-8dda7ef25ce5@oss.qualcomm.com
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>

Reference the reserved memory region for audio PD dynamic loading
and remote heap requirements. Add the required VMID list for memory
ownership transfers.

Link: https://lore.kernel.org/all/20260629-hamoa-remoteheap-v1-1-aa868b7a6e65@oss.qualcomm.com/
Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>

…port

The purwa-evk DTS currently lacks DAI links for DP0 and DP1, preventing
the sound card from exposing these playback paths. Add the missing links
to enable audio output on both DP interfaces.

This change follows the same approach as the fix for hamoa-evk.

Link: https://lore.kernel.org/all/20260701063003.3082899-1-le.qi@oss.qualcomm.com/
Signed-off-by: Le Qi <le.qi@oss.qualcomm.com>

Wire up the LDO supplies required by the QREF and refgen blocks on Purwa
and Hamoa boards. Purwa's QREF topology is same as Hamoa's, so it reuses
the same qcom,x1e80100-tcsr compatible and supply set rather than needing
a dedicated one.

Link: https://lore.kernel.org/linux-arm-msm/20260714-hamoa_tcsr_qref_0714_2-v1-3-13047922a376@oss.qualcomm.com/
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>

Add Battery Current Limiting (BCL) hardware monitor node for
hamoa-pmic. The BCL monitors battery voltage and current, providing
hardware interrupts when configurable thresholds are violated.

Signed-off-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260722-qcom-bcl-hwmon-v2-4-febe2805e17b@oss.qualcomm.com

Add Battery Current Limiting (BCL) hardware monitor node for pm8550
PMIC. The BCL monitors battery voltage and current, providing hardware
interrupts when configurable thresholds are violated.

Signed-off-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260722-qcom-bcl-hwmon-v2-7-febe2805e17b@oss.qualcomm.com

…-map"

This reverts commit e7fa3c7.

Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>

The Iris VPU has separate streams with different IOVA constraints. The
non-pixel stream must be limited to the 0-600 MB IOVA range, while the
pixel stream can use the full IOVA space.
Using a single set of IOMMU entries for the Iris node does not describe
these per-stream limits and can allow accesses outside the supported
range, which may lead to device crashes. One such issue was reported at:
https://gitlab.freedesktop.org/drm/msm/-/work_items/100

Add non-pixel and pixel child nodes, move each stream ID to its
corresponding child node, and add a reserved IOVA range for the
non-pixel stream.

Link: https://lore.kernel.org/all/20260709-vpu_iommu_iova_handling-v1-7-72bb62cb2dfd@oss.qualcomm.com
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
Tested-by: Daniel J Blueman <daniel@quora.org>

Document the compatible string for inline crypto engine found
on the Qualcomm X1E80100 SoC, used by the Hamoa IoT EVK board.

Link: https://lore.kernel.org/all/20260728-hamoa_ufs_ice_change-v3-1-293c7c6c2ae5@oss.qualcomm.com/
Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>

Add the Inline Crypto Engine (ICE) device node to describe the
hardware-accelerated inline encryption for UFS storage on the
Hamoa IoT EVK board (Qualcomm X1E80100 SoC).

Link: https://lore.kernel.org/all/20260728-hamoa_ufs_ice_change-v3-2-293c7c6c2ae5@oss.qualcomm.com/
Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>

…timer

The Hamoa IoT EVK hardware design uses a Parade PS8830 retimer on
I2C3 for USB Type-C port 0. Describe the retimer and route typec0
through it to enable USB 3.0 SuperSpeed and DisplayPort Alt Mode.

Supply the PS8830 from the existing vreg_rtmr0_* rails and remove
their stale "Left unused" annotation.

The FSUSB42 SBU mux chip is present on the PCB but with all signal
lines unconnected (NC), so remove the fsusb42 node and its pinctrl
group.

Tested on the Hamoa IoT EVK:

USB 3.0 SuperSpeed at 5 Gbps on typec0
DisplayPort Alt Mode on typec0

Link: https://lore.kernel.org/all/20260803132753.994619-1-xin.liu@oss.qualcomm.com/
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>

Hamoa IoT EVKs are available with and without an eDP panel. When the
panel is absent, DP3 is unused, but the base DTS still describes the
eDP panel and display path.

This causes the eDP driver to probe an unavailable panel, resulting in
AUX probe timeouts and missing display modes. Userspace then attempts
display commits through the eDP connector, causing repeated DPU vblank,
frame-done, and IRQ timeout errors.

Move the eDP-specific nodes into an overlay so the base DTB describes
the configuration without the panel, while the overlay enables eDP for
boards with the panel connected.

DT overlays cannot remove properties from a node defined in the base
DTB, so the /delete-property/ of #sound-dai-cells is moved into the
base DTS instead of the overlay, where it takes effect.

Link: https://lore.kernel.org/all/20260818-edp_overlay_for-next-v2-1-bd811d378fb7@oss.qualcomm.com/

Signed-off-by: Anand Tiwari <anand.tiwari@oss.qualcomm.com>

Purwa IoT EVKs are available with and without an eDP panel. When the
panel is absent, DP3 is unused, but the base DTS still describes the
eDP panel and display path.

This causes the eDP driver to probe an unavailable panel, resulting in
AUX probe timeouts and missing display modes. Userspace then attempts
display commits through the eDP connector, causing repeated DPU vblank,
frame-done, and IRQ timeout errors.

Move the eDP-specific nodes into an overlay so the base DTB describes
the configuration without the panel, while the overlay enables eDP for
boards with the panel connected.

DT overlays cannot remove properties from a node defined in the base
DTB, so the /delete-property/ of #sound-dai-cells is moved into the
base DTS instead of the overlay, where it takes effect.

Link: https://lore.kernel.org/all/20260818-edp_overlay_for-next-v2-2-bd811d378fb7@oss.qualcomm.com/

Signed-off-by: Anand Tiwari <anand.tiwari@oss.qualcomm.com>